ECS K7S6A Socket A DDR333

Tuesday, March 05, 2002


Introduction

The very moment that the SiS745 chipset hit the market, we were raring to test it out. Of course, we weren't expecting any new motherboards to incorporate the chips for quite a while. Fortunately, we were quite wrong, and ECS once again surprised us by pulling the proverbial rabbit out of its hat, in the form of the SiS745-based K7S6A mainboard. Even at first glance, the board certainly has a lot going for it. It supports the much anticipated DDR333 memory standard, and even includes an integrated IEEE-1394 (Firewire) controller. From a technical standpoint, one of its more interesting features, though, is that incorporates both the North and Southbridges in a single chip.

Sound intriguing? If so, then please feel free to follow along, as we take a closer look...

Below, a photo demonstrating the highly integrated nature of the SiS745 chipset.



Characteristics of the ECS K7S6A
CPU
Supports Socket A Athlon XP/Athlon/Duron processors
Chipset
Sis 745
Form factor
ATX 30.4cm X 22cm
Expansion
5 PCI - 0 ISA - 1 ACR - 1 AGP - 6 USB
Memory
3X 184-pin DIMM 3GB DDR SDRAM PC1600 - PC2100 - PC2700
FSB
100MHz, 103MHz, 107MHz, 110MHz, 112MHz, 124MHz, 133MHz, 137MHz, 143MHz, 147MHz, 150MHz and 166MHz,
Vcore adj.
1.10v to 1.85v in steps of 0.025v
Vio adj.
NA
Audio chipset
integrated into chipset


Configuration

As you might expect, the K7S6A - like most ECS boards - is quite simple to configure. This is due in no small part to the simplified nature of its Overclocking abilities. As one result, only a few on-board jumpers are to be found, and fewer are directly related to the CPU. Among those that do, we can count the ten jumpers labeled FIDJP, which can be used to set the clock-multiplier to between 5X and 12.5X.

All other adjustments are exclusively available from within the BIOS.

Among those functions, the "Frequency/Voltage Control" menu includes the ability to set both the FSB and memory bus frequencies to any of values indicated in the table above (Please note that the memory bus can be set to act synchronously, or asynchronously), and to alter the Vcore voltage.

The "Advanced Chipset Features" menu, on the other hand, includes a number of different options for altering various memory timing settings.

Index:

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