The Gigabyte GA-71XE
AMD K7 Athlon mainboard

Tuesday, April 04, 2000


Introduction

Seemingly identical to the GA-71X, the GA-71XE motherboard is essentially a revised version of the former, from whom it borrows most of its functionality. For its part, the GA-71XE offer several features over and above those of first generation Athlon boards - including the GA-71X - such as the ability to use bus frequencies over 100MHz. The GA-71XE, in fact, offers a good range of frequencies that were not offered by the GA-71X. That said, let's get down to the business of analyzing the board itself.



The features

The GA-71XE, much like its older brother, is based upon the Irongate (AMD750) chipset from AMD. This set is composed of two chips: the AMD751 Southbridge (for PCI/AGP), and the AMD756 Northbridge (for PCI/ISA/IDE). All told, the Gigabyte GA-71XE stays very close to the reference design set forth by AMD with their Fester board.

On board of the Gigabyte GA-71XE, one finds 5 PCI slots, 2 ISA slots, and 1 AGP port. As well, the GA-71XE sports 3 168-pin DIMM sockets which can support upto 768MB of active memory.

Much like the GA-71X, the GA-71XE is not able to run the memory bus at speeds over 100MHz. So, if you plan on installing PC133 memory on this board, you'll have to be content with running your memory at 100MHz, rather that the 133MHz it is truly capable of.

The GA-71XE's available bus frequencies include: 90Mhz, 95Mhz, 100Mhz, 105Mhz, 110Mhz, and 115Mhz.

As with the GA-71X, the GA-71XE offers a series of adjustments that allow the memory timing to be changed. The principal among them are:

SDRAM PH Limit: Specify the number of page-hit requests to allow before selecting a request
                             non-page-hit.

SDRAM Idle Limit: Specify how many cycles to idle before loading a bank
                              veille (un cycle de veille est dŽfinie comme Žtant un cycle ou aucune requte valide
                              n'est imposŽ au MCT).

SDRAM Trc Timing Value: Cette fonction spŽcifie le temps minimum entre ActivŽ et ActivŽ d'une mme                                             banque.

SDRAM Trp Timing Value: Cette fonction spŽcifie le temps de dŽlais entre une commande prŽcharge et                                            une commande ActivŽ.

SDRAM Tras Timing Value: Cette fonction spŽcifie le minimum de temps actif d'une banque                                                   SRAS[2.0]#).

SDRAM Cas latency: Cette fonction spŽcifie le dŽlai ˆ partir de SRAS[2.0]#) aux donnŽes valides.

Next: The features (continued)